diff options
| -rw-r--r-- | .SRCINFO | 18 | ||||
| -rw-r--r-- | 0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch | 12 | ||||
| -rw-r--r-- | 0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch | 10 | ||||
| -rw-r--r-- | 0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch | 107 | ||||
| -rw-r--r-- | 0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch | 115 | ||||
| -rw-r--r-- | 0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch | 167 | ||||
| -rw-r--r-- | PKGBUILD | 14 |
7 files changed, 422 insertions, 21 deletions
@@ -1,5 +1,5 @@ pkgbase = linux-ck - pkgver = 5.11.12 + pkgver = 5.11.13 pkgrel = 1 url = https://wiki.archlinux.org/index.php/Linux-ck arch = x86_64 @@ -12,22 +12,28 @@ pkgbase = linux-ck makedepends = tar makedepends = xz options = !strip - source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.12.tar.xz - source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.12.tar.sign + source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.13.tar.xz + source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.13.tar.sign source = config source = more-uarches-20210402.tar.gz::https://github.com/graysky2/kernel_gcc_patch/archive/20210402.tar.gz source = http://ck.kolivas.org/patches/5.0/5.11/5.11-ck1/patch-5.11-ck1.xz source = 0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch source = 0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch + source = 0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch + source = 0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch + source = 0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886 validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E - b2sums = 1defa8e4ef10663e48f62f9c9f7d3a35dd52d6aeaa91fa08371ae96c73a3098196c0e0a17beb78b8a6e246cc51ff3e3e59ffb85abb94c2bd8c14b8282e1e82bc + b2sums = fd9537a0eb265660ed25d12ff4098ca208035576c580f81cb6a1355eedde2748bdb65521641f68e626a1aee49e7494c79627015a376b7ee4a6373622605ac760 b2sums = SKIP b2sums = 4f43af91d2b6a3ddca56c187595538b1920fbc5a9ec87cb7c714501f7a03ec8513c7ef09e76ac9350feb815e09c68b57fca6adb1d47c41d7583d7e1ff5a5de08 b2sums = b8c3ba685a7fa34f8b047467a41e2e78702c41e54469934515c7d2f221411b2357a7378b86edaf2ca7ce1a3f9b627878438ab1cfcdae4fc681f47021d9a813d9 b2sums = 81d948aef4423255ebb4fa9b12c96207af8d14e225cf95d631dfbb1c0e88d31f60f81c2aff63046a78d8daf2601270ebb1d9cfaeccc3e3fdb08dbc430b53aff5 - b2sums = c22463da6e78830e104f728c00cf43573a7e1a59c17234f49844b9295eab953f4e119d34a0621feb816b9f1f0469dd769884f9ed1740c73176625435ea0a8624 - b2sums = 917b32c49ed6d96fcbcbe661e0232ff720f9e317e5e1e884152e937f46a00877f9b44584ef3cd8804bcf6d1626886f3a2edc1eb84f605c71a0f0cdfa6c3d4e32 + b2sums = 2c197117aa915971edb97ec98233d4c394f6790829486403bc51732a18fe12338d82e680ccafd138153affe9830d815ee1b52c7d1f3ed7937bc7a0c1fac3a5ef + b2sums = b1cdc2e8d99ff59d57897fc99aa2a11b07f96f9461420d6d8d499fb4ff0740e317a8f9ede72b3041018ac89ab07a53c0014d19c06a9bb038055c4d5ed79f3b0d + b2sums = ce586c65af54313c93e4dc55d56cf46840ac1b6a4f2a83b115529f4d9ef402158d28fa042967f1b685a11955371360513662f4b2eb1c75b5bba2ecd7ec31d8a9 + b2sums = 5a93bf75f5c9995270af06d8ded3e57f53f0a11fd5c2e24909c9af9140a5275555c0ae7d50b2a064d76517d6d3536beb7850930ab5aec829be81b59b5a6b55aa + b2sums = 782e1ddb0400a7155b92f71e86ab1e717d3dbd159b4f003d2d4bdcd0baa660466ecdbc899f3b5e371c7e7400a940d4de0a3e46ff7418a641cd614ed738b16c86 pkgname = linux-ck pkgdesc = The Linux-ck kernel and modules with the ck1 patchset featuring MuQSS CPU scheduler diff --git a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch index 11567cef166e..0a774034cf71 100644 --- a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch +++ b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch @@ -1,7 +1,7 @@ -From 831eecdabcef05828987209749a3db5242e3ce29 Mon Sep 17 00:00:00 2001 +From f904ba21627dd22bd38c9696bd542fecc7abe429 Mon Sep 17 00:00:00 2001 From: "Jan Alexander Steffens (heftig)" <jan.steffens@gmail.com> Date: Mon, 16 Sep 2019 04:53:20 +0200 -Subject: [PATCH 1/3] ZEN: Add sysctl and CONFIG to disallow unprivileged +Subject: [PATCH 1/6] ZEN: Add sysctl and CONFIG to disallow unprivileged CLONE_NEWUSER Our default behavior continues to match the vanilla kernel. @@ -63,7 +63,7 @@ index b7d3c6a12196..9e8a5351063e 100644 bool "PID Namespaces" default y diff --git a/kernel/fork.c b/kernel/fork.c -index d66cd1014211..231a94ffd302 100644 +index 808af2cc8ab6..09658cb5317e 100644 --- a/kernel/fork.c +++ b/kernel/fork.c @@ -97,6 +97,10 @@ @@ -77,7 +77,7 @@ index d66cd1014211..231a94ffd302 100644 #include <asm/pgalloc.h> #include <linux/uaccess.h> #include <asm/mmu_context.h> -@@ -1864,6 +1868,10 @@ static __latent_entropy struct task_struct *copy_process( +@@ -1872,6 +1876,10 @@ static __latent_entropy struct task_struct *copy_process( if ((clone_flags & (CLONE_NEWUSER|CLONE_FS)) == (CLONE_NEWUSER|CLONE_FS)) return ERR_PTR(-EINVAL); @@ -88,7 +88,7 @@ index d66cd1014211..231a94ffd302 100644 /* * Thread groups must share signals as well, and detached threads * can only be started up within the thread group. -@@ -2933,6 +2941,12 @@ int ksys_unshare(unsigned long unshare_flags) +@@ -2941,6 +2949,12 @@ int ksys_unshare(unsigned long unshare_flags) if (unshare_flags & CLONE_NEWNS) unshare_flags |= CLONE_FS; @@ -150,5 +150,5 @@ index af612945a4d0..95c54dae4aa1 100644 static DEFINE_MUTEX(userns_state_mutex); -- -2.31.0 +2.31.1 diff --git a/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch b/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch index 10f06e0d4034..9a15c75a9c5e 100644 --- a/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch +++ b/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch @@ -1,7 +1,7 @@ -From fa6692f3c77252a239725dab4352cecf34e12098 Mon Sep 17 00:00:00 2001 +From 604d731ed0605ad0d7019b282d8774c220485677 Mon Sep 17 00:00:00 2001 From: David Woodhouse <dwmw@amazon.co.uk> Date: Mon, 15 Mar 2021 11:15:02 +0000 -Subject: [PATCH 2/3] iommu/amd: Don't initialise remapping irqdomain if IOMMU +Subject: [PATCH 2/6] iommu/amd: Don't initialise remapping irqdomain if IOMMU is disabled When the IOMMU is disabled, the driver still enumerates and initialises @@ -53,10 +53,10 @@ Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c -index 01da76dc1caa..3ea395ef4929 100644 +index 78339b0bb8e5..398909dab640 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c -@@ -2997,6 +2997,9 @@ int __init amd_iommu_prepare(void) +@@ -2998,6 +2998,9 @@ int __init amd_iommu_prepare(void) { int ret; @@ -67,5 +67,5 @@ index 01da76dc1caa..3ea395ef4929 100644 ret = iommu_go_to_state(IOMMU_ACPI_FINISHED); -- -2.31.0 +2.31.1 diff --git a/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch b/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch new file mode 100644 index 000000000000..e8d116c25262 --- /dev/null +++ b/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch @@ -0,0 +1,107 @@ +From 1b5f96a934af463ddb037b78871afe8a3524e665 Mon Sep 17 00:00:00 2001 +From: Imre Deak <imre.deak@intel.com> +Date: Wed, 17 Mar 2021 20:48:59 +0200 +Subject: [PATCH 3/6] drm/i915/ilk-glk: Fix link training on links with LTTPRs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Cherry-picked from intel-drm-next 984982f3ef7b240cd24c2feb2762d81d9d8da3c2 + +The spec requires to use at least 3.2ms for the AUX timeout period if +there are LT-tunable PHY Repeaters on the link (2.11.2). An upcoming +spec update makes this more specific, by requiring a 3.2ms minimum +timeout period for the LTTPR detection reading the 0xF0000-0xF0007 +range (3.6.5.1). + +Accordingly disable LTTPR detection until GLK, where the maximum timeout +we can set is only 1.6ms. + +Link training in the non-transparent mode is known to fail at least on +some SKL systems with a WD19 dock on the link, which exposes an LTTPR +(see the References below). While this could have different reasons +besides the too short AUX timeout used, not detecting LTTPRs (and so not +using the non-transparent LT mode) fixes link training on these systems. + +While at it add a code comment about the platform specific maximum +timeout values. + +v2: Add a comment about the g4x maximum timeout as well. (Ville) + +Reported-by: Takashi Iwai <tiwai@suse.de> +Reported-and-tested-by: Santiago Zarate <santiago.zarate@suse.com> +Reported-and-tested-by: Bodo Graumann <mail@bodograumann.de> +References: https://gitlab.freedesktop.org/drm/intel/-/issues/3166 +Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training") +Cc: <stable@vger.kernel.org> # v5.11 +Cc: Takashi Iwai <tiwai@suse.de> +Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> +Signed-off-by: Imre Deak <imre.deak@intel.com> +Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> +Link: https://patchwork.freedesktop.org/patch/msgid/20210317184901.4029798-2-imre.deak@intel.com +--- + drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++ + .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++++++--- + 2 files changed, 19 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c +index 8a26307c4896..1930df9a8bcc 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp.c ++++ b/drivers/gpu/drm/i915/display/intel_dp.c +@@ -1400,6 +1400,7 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp, + else + precharge = 5; + ++ /* Max timeout value on G4x-BDW: 1.6ms */ + if (IS_BROADWELL(dev_priv)) + timeout = DP_AUX_CH_CTL_TIME_OUT_600us; + else +@@ -1426,6 +1427,12 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp, + enum phy phy = intel_port_to_phy(i915, dig_port->base.port); + u32 ret; + ++ /* ++ * Max timeout values: ++ * SKL-GLK: 1.6ms ++ * CNL: 3.2ms ++ * ICL+: 4ms ++ */ + ret = DP_AUX_CH_CTL_SEND_BUSY | + DP_AUX_CH_CTL_DONE | + DP_AUX_CH_CTL_INTERRUPT | +diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c +index d8c6d7054d11..f916b9f04b6b 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c +@@ -93,6 +93,18 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp, + + static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp) + { ++ struct drm_i915_private *i915 = dp_to_i915(intel_dp); ++ ++ if (intel_dp_is_edp(intel_dp)) ++ return false; ++ ++ /* ++ * Detecting LTTPRs must be avoided on platforms with an AUX timeout ++ * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1). ++ */ ++ if (INTEL_GEN(i915) < 10) ++ return false; ++ + if (drm_dp_read_lttpr_common_caps(&intel_dp->aux, + intel_dp->lttpr_common_caps) < 0) { + memset(intel_dp->lttpr_common_caps, 0, +@@ -138,9 +150,6 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp) + bool ret; + int i; + +- if (intel_dp_is_edp(intel_dp)) +- return 0; +- + ret = intel_dp_read_lttpr_common_caps(intel_dp); + + /* +-- +2.31.1 + diff --git a/0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch b/0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch new file mode 100644 index 000000000000..cdaf266318cd --- /dev/null +++ b/0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch @@ -0,0 +1,115 @@ +From a14c9499777b921bbbd3c912daf87e103c5b4fcb Mon Sep 17 00:00:00 2001 +From: Imre Deak <imre.deak@intel.com> +Date: Mon, 18 Jan 2021 20:31:43 +0200 +Subject: [PATCH 4/6] drm/i915/dp: Prevent setting the LTTPR LT mode if no + LTTPRs are detected + +Cherry-picked from 3b7bbb3619d2cc92f04ba10ad27d3b616aabf175 + +Atm, the driver programs explicitly the default transparent link +training mode (0x55) to DP_PHY_REPEATER_MODE even if no LTTPRs are +detected. + +This conforms to the spec (3.6.6.1): +"DP upstream devices that do not enable the Non-transparent mode of + LTTPRs shall program the PHY_REPEATER_MODE register (DPCD Address + F0003h) to 55h (default) prior to link training" + +however writing the default value to this DPCD register seems to cause +occasional link training errors at least for a DELL WD19TB TBT dock, when +no LTTPRs are detected. + +Writing to DP_PHY_REPEATER_MODE will also cause an unnecessary timeout +on systems without any LTTPR. + +To fix the above two issues let's assume that setting the default mode +is redundant when no LTTPRs are detected. Keep the existing behavior and +program the default mode if more than 8 LTTPRs are detected or in case +the read from DP_PHY_REPEATER_CNT returns an invalid value. + +References: https://gitlab.freedesktop.org/drm/intel/-/issues/2801 +Signed-off-by: Imre Deak <imre.deak@intel.com> +Reviewed-by: Khaled Almahallawy <khaled.almahallawy@intel.com> +Link: https://patchwork.freedesktop.org/patch/msgid/20210118183143.1145707-1-imre.deak@intel.com +--- + .../drm/i915/display/intel_dp_link_training.c | 36 ++++++++----------- + 1 file changed, 15 insertions(+), 21 deletions(-) + +diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c +index f916b9f04b6b..0359d5936901 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c +@@ -34,18 +34,6 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE]) + link_status[3], link_status[4], link_status[5]); + } + +-static int intel_dp_lttpr_count(struct intel_dp *intel_dp) +-{ +- int count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps); +- +- /* +- * Pretend no LTTPRs in case of LTTPR detection error, or +- * if too many (>8) LTTPRs are detected. This translates to link +- * training in transparent mode. +- */ +- return count <= 0 ? 0 : count; +-} +- + static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp) + { + intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT - +@@ -151,6 +139,17 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp) + int i; + + ret = intel_dp_read_lttpr_common_caps(intel_dp); ++ if (!ret) ++ return 0; ++ ++ lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps); ++ /* ++ * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are ++ * detected as this breaks link training at least on the Dell WD19TB ++ * dock. ++ */ ++ if (lttpr_count == 0) ++ return 0; + + /* + * See DP Standard v2.0 3.6.6.1. about the explicit disabling of +@@ -159,17 +158,12 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp) + */ + intel_dp_set_lttpr_transparent_mode(intel_dp, true); + +- if (!ret) +- return 0; +- +- lttpr_count = intel_dp_lttpr_count(intel_dp); +- + /* + * In case of unsupported number of LTTPRs or failing to switch to + * non-transparent mode fall-back to transparent link training mode, + * still taking into account any LTTPR common lane- rate/count limits. + */ +- if (lttpr_count == 0) ++ if (lttpr_count < 0) + return 0; + + if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) { +@@ -231,11 +225,11 @@ intel_dp_phy_is_downstream_of_source(struct intel_dp *intel_dp, + enum drm_dp_phy dp_phy) + { + struct drm_i915_private *i915 = dp_to_i915(intel_dp); +- int lttpr_count = intel_dp_lttpr_count(intel_dp); ++ int lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps); + +- drm_WARN_ON_ONCE(&i915->drm, lttpr_count == 0 && dp_phy != DP_PHY_DPRX); ++ drm_WARN_ON_ONCE(&i915->drm, lttpr_count <= 0 && dp_phy != DP_PHY_DPRX); + +- return lttpr_count == 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1); ++ return lttpr_count <= 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1); + } + + static u8 intel_dp_phy_voltage_max(struct intel_dp *intel_dp, +-- +2.31.1 + diff --git a/0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch b/0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch new file mode 100644 index 000000000000..80c2cf98f15d --- /dev/null +++ b/0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch @@ -0,0 +1,167 @@ +From bc74b7fc2c75cf5f1844bb24a2caea4140937ac6 Mon Sep 17 00:00:00 2001 +From: Imre Deak <imre.deak@intel.com> +Date: Wed, 17 Mar 2021 21:01:49 +0200 +Subject: [PATCH 5/6] drm/i915: Disable LTTPR support when the DPCD rev < 1.4 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Cherry picked from intel-drm-next 264613b406eb0d74cd9ca582c717c5e2c5a975ea + +By the specification the 0xF0000-0xF02FF range is only valid when the +DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so. + +Trying to detect LTTPRs returned corrupted values for the above DPCD +range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD +revision 1.2 connected. + +v2: Add the actual version check. +v3: Fix s/DRPX/DPRX/ typo. + +Fixes: 7b2a4ab8b0ef ("drm/i915: Switch to LTTPR transparent mode link training") +Cc: <stable@vger.kernel.org> # v5.11 +Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> +Signed-off-by: Imre Deak <imre.deak@intel.com> +Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> +Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com +--- + drivers/gpu/drm/i915/display/intel_dp.c | 4 +- + .../drm/i915/display/intel_dp_link_training.c | 48 ++++++++++++++----- + .../drm/i915/display/intel_dp_link_training.h | 2 +- + 3 files changed, 39 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c +index 1930df9a8bcc..bc2aae63fe40 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp.c ++++ b/drivers/gpu/drm/i915/display/intel_dp.c +@@ -4878,9 +4878,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) + { + int ret; + +- intel_dp_lttpr_init(intel_dp); +- +- if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) ++ if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0) + return false; + + /* +diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c +index 0359d5936901..e6532ea5757b 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c +@@ -34,6 +34,11 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE]) + link_status[3], link_status[4], link_status[5]); + } + ++static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp) ++{ ++ memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps)); ++} ++ + static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp) + { + intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT - +@@ -95,8 +100,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp) + + if (drm_dp_read_lttpr_common_caps(&intel_dp->aux, + intel_dp->lttpr_common_caps) < 0) { +- memset(intel_dp->lttpr_common_caps, 0, +- sizeof(intel_dp->lttpr_common_caps)); ++ intel_dp_reset_lttpr_common_caps(intel_dp); + return false; + } + +@@ -118,30 +122,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable) + } + + /** +- * intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode ++ * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode + * @intel_dp: Intel DP struct + * +- * Read the LTTPR common capabilities, switch to non-transparent link training +- * mode if any is detected and read the PHY capabilities for all detected +- * LTTPRs. In case of an LTTPR detection error or if the number of ++ * Read the LTTPR common and DPRX capabilities and switch to non-transparent ++ * link training mode if any is detected and read the PHY capabilities for all ++ * detected LTTPRs. In case of an LTTPR detection error or if the number of + * LTTPRs is more than is supported (8), fall back to the no-LTTPR, + * transparent mode link training mode. + * + * Returns: +- * >0 if LTTPRs were detected and the non-transparent LT mode was set ++ * >0 if LTTPRs were detected and the non-transparent LT mode was set. The ++ * DPRX capabilities are read out. + * 0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a +- * detection failure and the transparent LT mode was set ++ * detection failure and the transparent LT mode was set. The DPRX ++ * capabilities are read out. ++ * <0 Reading out the DPRX capabilities failed. + */ +-int intel_dp_lttpr_init(struct intel_dp *intel_dp) ++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp) + { + int lttpr_count; + bool ret; + int i; + + ret = intel_dp_read_lttpr_common_caps(intel_dp); ++ ++ /* The DPTX shall read the DPRX caps after LTTPR detection. */ ++ if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) { ++ intel_dp_reset_lttpr_common_caps(intel_dp); ++ return -EIO; ++ } ++ + if (!ret) + return 0; + ++ /* ++ * The 0xF0000-0xF02FF range is only valid if the DPCD revision is ++ * at least 1.4. ++ */ ++ if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) { ++ intel_dp_reset_lttpr_common_caps(intel_dp); ++ return 0; ++ } ++ + lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps); + /* + * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are +@@ -181,7 +204,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp) + + return lttpr_count; + } +-EXPORT_SYMBOL(intel_dp_lttpr_init); ++EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps); + + static u8 dp_voltage_max(u8 preemph) + { +@@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp, + * TODO: Reiniting LTTPRs here won't be needed once proper connector + * HW state readout is added. + */ +- int lttpr_count = intel_dp_lttpr_init(intel_dp); ++ int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp); ++ ++ if (lttpr_count < 0) ++ return; + + if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count)) + intel_dp_schedule_fallback_link_training(intel_dp, crtc_state); +diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h +index 6a1f76bd8c75..9cb7c28027f0 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h ++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h +@@ -11,7 +11,7 @@ + struct intel_crtc_state; + struct intel_dp; + +-int intel_dp_lttpr_init(struct intel_dp *intel_dp); ++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp); + + void intel_dp_get_adjust_train(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, +-- +2.31.1 + @@ -60,7 +60,7 @@ _subarch= ### IMPORTANT: Do no edit below this line unless you know what you're doing pkgbase=linux-ck -pkgver=5.11.12 +pkgver=5.11.13 pkgrel=1 _ckpatchversion=1 arch=(x86_64) @@ -79,18 +79,24 @@ source=( "http://ck.kolivas.org/patches/5.0/5.11/5.11-ck${_ckpatchversion}/$_ckpatch.xz" 0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch 0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch + 0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch + 0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch + 0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch ) validpgpkeys=( 'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds '647F28654894E3BD457199BE38DBBDC86092693E' # Greg Kroah-Hartman ) -b2sums=('1defa8e4ef10663e48f62f9c9f7d3a35dd52d6aeaa91fa08371ae96c73a3098196c0e0a17beb78b8a6e246cc51ff3e3e59ffb85abb94c2bd8c14b8282e1e82bc' +b2sums=('fd9537a0eb265660ed25d12ff4098ca208035576c580f81cb6a1355eedde2748bdb65521641f68e626a1aee49e7494c79627015a376b7ee4a6373622605ac760' 'SKIP' '4f43af91d2b6a3ddca56c187595538b1920fbc5a9ec87cb7c714501f7a03ec8513c7ef09e76ac9350feb815e09c68b57fca6adb1d47c41d7583d7e1ff5a5de08' 'b8c3ba685a7fa34f8b047467a41e2e78702c41e54469934515c7d2f221411b2357a7378b86edaf2ca7ce1a3f9b627878438ab1cfcdae4fc681f47021d9a813d9' '81d948aef4423255ebb4fa9b12c96207af8d14e225cf95d631dfbb1c0e88d31f60f81c2aff63046a78d8daf2601270ebb1d9cfaeccc3e3fdb08dbc430b53aff5' - 'c22463da6e78830e104f728c00cf43573a7e1a59c17234f49844b9295eab953f4e119d34a0621feb816b9f1f0469dd769884f9ed1740c73176625435ea0a8624' - '917b32c49ed6d96fcbcbe661e0232ff720f9e317e5e1e884152e937f46a00877f9b44584ef3cd8804bcf6d1626886f3a2edc1eb84f605c71a0f0cdfa6c3d4e32') + '2c197117aa915971edb97ec98233d4c394f6790829486403bc51732a18fe12338d82e680ccafd138153affe9830d815ee1b52c7d1f3ed7937bc7a0c1fac3a5ef' + 'b1cdc2e8d99ff59d57897fc99aa2a11b07f96f9461420d6d8d499fb4ff0740e317a8f9ede72b3041018ac89ab07a53c0014d19c06a9bb038055c4d5ed79f3b0d' + 'ce586c65af54313c93e4dc55d56cf46840ac1b6a4f2a83b115529f4d9ef402158d28fa042967f1b685a11955371360513662f4b2eb1c75b5bba2ecd7ec31d8a9' + '5a93bf75f5c9995270af06d8ded3e57f53f0a11fd5c2e24909c9af9140a5275555c0ae7d50b2a064d76517d6d3536beb7850930ab5aec829be81b59b5a6b55aa' + '782e1ddb0400a7155b92f71e86ab1e717d3dbd159b4f003d2d4bdcd0baa660466ecdbc899f3b5e371c7e7400a940d4de0a3e46ff7418a641cd614ed738b16c86') export KBUILD_BUILD_HOST=archlinux export KBUILD_BUILD_USER=$pkgbase |