diff options
-rw-r--r-- | .SRCINFO | 4 | ||||
-rw-r--r-- | 0004-drm-amdgpu-pin-the-csb-buffer-on-hw-init-for-gfx-v8.patch | 86 | ||||
-rw-r--r-- | PKGBUILD | 6 | ||||
-rw-r--r-- | config | 2 |
4 files changed, 94 insertions, 4 deletions
@@ -20,11 +20,12 @@ pkgbase = linux-ck source = 0001-add-sysctl-to-disallow-unprivileged-CLONE_NEWUSER-by.patch source = 0002-ZEN-Add-CONFIG-for-unprivileged_userns_clone.patch source = 0003-iwlwifi-mvm-disable-TX-AMSDU-on-older-NICs.patch + source = 0004-drm-amdgpu-pin-the-csb-buffer-on-hw-init-for-gfx-v8.patch validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886 validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E sha256sums = 6096c4387c2a296de9136080942d11ae3f1bd28129b6952f7133c570e43bfc49 sha256sums = SKIP - sha256sums = 1c4d5500a3b4995035c2e940fc0ad2a2dae7be047c8eb20c097444e348258f87 + sha256sums = 42e2bc6a7d8439b3a6fe4084d1349077472e0a6831d8a39edda46824a5f0987b sha256sums = ae2e95db94ef7176207c690224169594d49445e04249d2499e9d2fbc117a0b21 sha256sums = c043f3033bb781e2688794a59f6d1f7ed49ef9b13eb77ff9a425df33a244a636 sha256sums = ad6344badc91ad0630caacde83f7f9b97276f80d26a20619a87952be65492c65 @@ -33,6 +34,7 @@ pkgbase = linux-ck sha256sums = 91fafa76bf9cb32159ac7f22191b3589278b91e65bc4505cf2fc6013b8037bf3 sha256sums = 63e4378e69e2f23ed87af32a4951477a6d82d4ac0de2295db46502c8120da9d9 sha256sums = fc96300831506965383ef30bc46b72735dc45bb97dea2ccb8b9450c005d2f020 + sha256sums = 2186ca201a99edb94ce56840132544c47234636aada75b75aca6bfa780e04f57 pkgname = linux-ck pkgdesc = The Linux-ck kernel and modules with the ck1 patchset featuring MuQSS CPU scheduler v0.192 diff --git a/0004-drm-amdgpu-pin-the-csb-buffer-on-hw-init-for-gfx-v8.patch b/0004-drm-amdgpu-pin-the-csb-buffer-on-hw-init-for-gfx-v8.patch new file mode 100644 index 000000000000..57d6f44a0572 --- /dev/null +++ b/0004-drm-amdgpu-pin-the-csb-buffer-on-hw-init-for-gfx-v8.patch @@ -0,0 +1,86 @@ +From dd672eb4f207fcb2b26bafa0d61f118c3c11a479 Mon Sep 17 00:00:00 2001 +From: Likun Gao <Likun.Gao@amd.com> +Date: Fri, 2 Aug 2019 15:18:57 +0800 +Subject: [PATCH 4/5] drm/amdgpu: pin the csb buffer on hw init for gfx v8 + +Without this pin, the csb buffer will be filled with inconsistent +data after S3 resume. And that will causes gfx hang on gfxoff +exit since this csb will be executed then. + +Signed-off-by: Likun Gao <Likun.Gao@amd.com> +Tested-by: Paul Gover <pmw.gover@yahoo.co.uk> +Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> +Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 40 +++++++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 02955e6e9dd9..c21ef99cc590 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -1317,6 +1317,39 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) + return 0; + } + ++static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev) ++{ ++ int r; ++ ++ r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); ++ if (unlikely(r != 0)) ++ return r; ++ ++ r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, ++ AMDGPU_GEM_DOMAIN_VRAM); ++ if (!r) ++ adev->gfx.rlc.clear_state_gpu_addr = ++ amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj); ++ ++ amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); ++ ++ return r; ++} ++ ++static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev) ++{ ++ int r; ++ ++ if (!adev->gfx.rlc.clear_state_obj) ++ return; ++ ++ r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); ++ if (likely(r == 0)) { ++ amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); ++ amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); ++ } ++} ++ + static void gfx_v8_0_mec_fini(struct amdgpu_device *adev) + { + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); +@@ -4777,6 +4810,10 @@ static int gfx_v8_0_hw_init(void *handle) + gfx_v8_0_init_golden_registers(adev); + gfx_v8_0_constants_init(adev); + ++ r = gfx_v8_0_csb_vram_pin(adev); ++ if (r) ++ return r; ++ + r = adev->gfx.rlc.funcs->resume(adev); + if (r) + return r; +@@ -4893,6 +4930,9 @@ static int gfx_v8_0_hw_fini(void *handle) + else + pr_err("rlc is busy, skip halt rlc\n"); + amdgpu_gfx_rlc_exit_safe_mode(adev); ++ ++ gfx_v8_0_csb_vram_unpin(adev); ++ + return 0; + } + +-- +2.23.0 + @@ -85,6 +85,7 @@ source=( 0001-add-sysctl-to-disallow-unprivileged-CLONE_NEWUSER-by.patch 0002-ZEN-Add-CONFIG-for-unprivileged_userns_clone.patch 0003-iwlwifi-mvm-disable-TX-AMSDU-on-older-NICs.patch + 0004-drm-amdgpu-pin-the-csb-buffer-on-hw-init-for-gfx-v8.patch ) validpgpkeys=( 'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds @@ -92,7 +93,7 @@ validpgpkeys=( ) sha256sums=('6096c4387c2a296de9136080942d11ae3f1bd28129b6952f7133c570e43bfc49' 'SKIP' - '1c4d5500a3b4995035c2e940fc0ad2a2dae7be047c8eb20c097444e348258f87' + '42e2bc6a7d8439b3a6fe4084d1349077472e0a6831d8a39edda46824a5f0987b' 'ae2e95db94ef7176207c690224169594d49445e04249d2499e9d2fbc117a0b21' 'c043f3033bb781e2688794a59f6d1f7ed49ef9b13eb77ff9a425df33a244a636' 'ad6344badc91ad0630caacde83f7f9b97276f80d26a20619a87952be65492c65' @@ -100,7 +101,8 @@ sha256sums=('6096c4387c2a296de9136080942d11ae3f1bd28129b6952f7133c570e43bfc49' 'f1abc13a8d859fbf6350040e45d7f04ad551a6d39f113ba96fbbd820118c0e36' '91fafa76bf9cb32159ac7f22191b3589278b91e65bc4505cf2fc6013b8037bf3' '63e4378e69e2f23ed87af32a4951477a6d82d4ac0de2295db46502c8120da9d9' - 'fc96300831506965383ef30bc46b72735dc45bb97dea2ccb8b9450c005d2f020') + 'fc96300831506965383ef30bc46b72735dc45bb97dea2ccb8b9450c005d2f020' + '2186ca201a99edb94ce56840132544c47234636aada75b75aca6bfa780e04f57') _kernelname=${pkgbase#linux} : ${_kernelname:=-ARCH} @@ -8500,7 +8500,7 @@ CONFIG_IOMMU_SUPPORT=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_AMD_IOMMU=y -CONFIG_AMD_IOMMU_V2=m +CONFIG_AMD_IOMMU_V2=y CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y CONFIG_INTEL_IOMMU_SVM=y |