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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index d422353..c71f886 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -204,6 +204,8 @@ gpu: gpu@1800000 {
clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
clock-names = "core", "bus";
resets = <&ccu RST_BUS_GPU>;
+ operating-points-v2 = <&gpu_opp_table>;
+ #cooling-cells = <2>;
status = "disabled";
};
@@ -1176,6 +1178,105 @@ gpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
+ trips {
+ gpu_alert: gpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ gpu-crit {
+ temperature = <100000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&gpu_alert>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
+ gpu_opp_table: gpu-opp-table {
+ compatible = "operating-points-v2";
+
+ opp@216000000 {
+ opp-hz = /bits/ 64 <216000000>;
+ opp-microvolt = <810000 810000 1200000>;
+ };
+
+ opp@264000000 {
+ opp-hz = /bits/ 64 <264000000>;
+ opp-microvolt = <810000 810000 1200000>;
+ };
+
+ opp@312000000 {
+ opp-hz = /bits/ 64 <312000000>;
+ opp-microvolt = <810000 810000 1200000>;
+ };
+
+ opp@336000000 {
+ opp-hz = /bits/ 64 <336000000>;
+ opp-microvolt = <810000 810000 1200000>;
+ };
+
+ opp@360000000 {
+ opp-hz = /bits/ 64 <360000000>;
+ opp-microvolt = <820000 820000 1200000>;
+ };
+
+ opp@384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt = <830000 830000 1200000>;
+ };
+
+ opp@408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <840000 840000 1200000>;
+ };
+
+ opp@420000000 {
+ opp-hz = /bits/ 64 <420000000>;
+ opp-microvolt = <850000 850000 1200000>;
+ };
+
+ opp@432000000 {
+ opp-hz = /bits/ 64 <432000000>;
+ opp-microvolt = <860000 860000 1200000>;
+ };
+
+ opp@456000000 {
+ opp-hz = /bits/ 64 <456000000>;
+ opp-microvolt = <870000 870000 1200000>;
+ };
+
+ opp@504000000 {
+ opp-hz = /bits/ 64 <504000000>;
+ opp-microvolt = <890000 890000 1200000>;
+ };
+
+ opp@540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ opp-microvolt = <910000 910000 1200000>;
+ };
+
+ opp@576000000 {
+ opp-hz = /bits/ 64 <576000000>;
+ opp-microvolt = <930000 930000 1200000>;
+ };
+
+ opp@624000000 {
+ opp-hz = /bits/ 64 <624000000>;
+ opp-microvolt = <950000 950000 1200000>;
+ };
+
+ opp@756000000 {
+ opp-hz = /bits/ 64 <756000000>;
+ opp-microvolt = <1040000 1040000 1200000>;
};
};
};
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index 199ab77..db61727 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -299,7 +299,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(gpu_clk, "gpu", gpu_parents, 0x670,
0, 3, /* M */
24, 1, /* mux */
BIT(31), /* gate */
- CLK_SET_RATE_PARENT);
+ 0);
static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "psi-ahb1-ahb2",
0x67c, BIT(0), 0);
@@ -1240,6 +1240,15 @@ static int sun50i_h6_ccu_probe(struct platform_device *pdev)
val |= BIT(24);
writel(val, reg + SUN50I_H6_HDMI_CEC_CLK_REG);
+ /*
+ * Enforce n = 62 m = 1 p = 0 for GPU PLL = 756MHz
+ */
+
+ val = readl(reg + SUN50I_H6_PLL_GPU_REG);
+ val &= ~(GENMASK(8, 8) | BIT(1) | BIT(0));
+ val |= (62 << 8) | BIT(1);
+ writel(val, reg + SUN50I_H6_PLL_GPU_REG);
+
return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc);
}
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