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|
From cdfe728b3299400b7cd17d31bdfe5bedab6b1cc9 Mon Sep 17 00:00:00 2001
From: moson-mo <mo-son@mailbox.org>
Date: Thu, 7 Dec 2023 13:14:56 +0100
Subject: [PATCH 1/2] Add Rembrandt support
Signed-off-by: moson-mo <mo-son@mailbox.org>
---
drv.c | 2 ++
smu.c | 19 +++++++++++++++++--
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drv.c b/drv.c
index 2183bc1..a794dc2 100755
--- a/drv.c
+++ b/drv.c
@@ -30,6 +30,7 @@ MODULE_LICENSE("GPL");
#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
+#define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
#define MAX_ATTRS_LEN 13
@@ -428,6 +429,7 @@ static struct pci_device_id ryzen_smu_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
{ }
};
MODULE_DEVICE_TABLE(pci, ryzen_smu_id_table);
diff --git a/smu.c b/smu.c
index 40a57c1..a1821d0 100755
--- a/smu.c
+++ b/smu.c
@@ -303,6 +303,7 @@ int smu_resolve_cpu_class(struct pci_dev* dev) {
g_smu.codename = CODENAME_VERMEER;
break;
case 0x40:
+ case 0x44:
g_smu.codename = CODENAME_REMBRANDT;
break;
case 0x50:
@@ -360,12 +361,12 @@ int smu_init(struct pci_dev* dev) {
case CODENAME_RAVENRIDGE:
case CODENAME_RAVENRIDGE2:
case CODENAME_DALI:
+ case CODENAME_REMBRANDT:
g_smu.addr_rsmu_mb_cmd = 0x3B10A20;
g_smu.addr_rsmu_mb_rsp = 0x3B10A80;
g_smu.addr_rsmu_mb_args = 0x3B10A88;
goto LOG_RSMU;
- case CODENAME_VANGOGH:
- case CODENAME_REMBRANDT:
+ case CODENAME_VANGOGH:
pr_debug("RSMU Mailbox: Not supported or unknown, disabling use.");
goto MP1_DETECT;
default:
@@ -570,6 +571,7 @@ u64 smu_get_dram_base_address(struct pci_dev* dev) {
case CODENAME_RENOIR:
case CODENAME_LUCIENNE:
case CODENAME_CEZANNE:
+ case CODENAME_REMBRANDT:
fn[0] = 0x66;
goto BASE_ADDR_CLASS_1;
case CODENAME_COLFAX:
@@ -680,6 +682,7 @@ enum smu_return_val smu_transfer_table_to_dram(struct pci_dev* dev) {
break;
case CODENAME_RENOIR:
case CODENAME_LUCIENNE:
+ case CODENAME_REMBRANDT:
args.s.arg0 = 3;
fn = 0x65;
break;
@@ -768,6 +771,7 @@ enum smu_return_val smu_get_pm_table_version(struct pci_dev* dev, u32* version)
case CODENAME_RENOIR:
case CODENAME_LUCIENNE:
case CODENAME_CEZANNE:
+ case CODENAME_REMBRANDT:
fn = 0x06;
break;
default:
@@ -884,6 +888,16 @@ u32 smu_update_pmtable_size(u32 version) {
goto UNKNOWN_PM_TABLE_VERSION;
}
break;
+ case CODENAME_REMBRANDT:
+ switch (version) {
+ case 0x450004:
+ case 0x450005:
+ g_smu.pm_dram_map_size = 0xA44;
+ break;
+ default:
+ goto UNKNOWN_PM_TABLE_VERSION;
+ }
+ break;
case CODENAME_PICASSO:
case CODENAME_RAVENRIDGE:
case CODENAME_RAVENRIDGE2:
@@ -941,6 +955,7 @@ enum smu_return_val smu_read_pm_table(struct pci_dev* dev, unsigned char* dst, s
g_smu.codename == CODENAME_RAPHAEL ||
g_smu.codename == CODENAME_RENOIR ||
g_smu.codename == CODENAME_LUCIENNE ||
+ g_smu.codename == CODENAME_REMBRANDT ||
g_smu.codename == CODENAME_CEZANNE ||
g_smu.codename == CODENAME_CHAGALL ||
g_smu.codename == CODENAME_MILAN) {
--
GitLab
From 58feed93d8e55f27b0e6b7f66e0be165cf52fc23 Mon Sep 17 00:00:00 2001
From: moson-mo <mo-son@mailbox.org>
Date: Sun, 17 Dec 2023 14:00:04 +0100
Subject: [PATCH 2/2] Add Phoenix support
Signed-off-by: moson-mo <mo-son@mailbox.org>
---
drv.c | 2 ++
lib/libsmu.c | 2 ++
lib/libsmu.h | 1 +
scripts/dump_pm_table.py | 7 ++++++-
scripts/test.py | 7 ++++++-
smu.c | 27 +++++++++++++++++++++++++--
smu.h | 1 +
7 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/drv.c b/drv.c
index a794dc2..dc58055 100755
--- a/drv.c
+++ b/drv.c
@@ -31,6 +31,7 @@ MODULE_LICENSE("GPL");
#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
#define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
+#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
#define MAX_ATTRS_LEN 13
@@ -430,6 +431,7 @@ static struct pci_device_id ryzen_smu_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
{ }
};
MODULE_DEVICE_TABLE(pci, ryzen_smu_id_table);
diff --git a/lib/libsmu.c b/lib/libsmu.c
index 6d85482..dba5156 100755
--- a/lib/libsmu.c
+++ b/lib/libsmu.c
@@ -464,6 +464,8 @@ const char* smu_codename_to_str(smu_obj_t* obj) {
return "Lucienne";
case CODENAME_NAPLES:
return "Naples";
+ case CODENAME_PHOENIX:
+ return "Phoenix";
default:
return "Undefined";
}
diff --git a/lib/libsmu.h b/lib/libsmu.h
index 6b68b19..ac96e1e 100755
--- a/lib/libsmu.h
+++ b/lib/libsmu.h
@@ -94,6 +94,7 @@ typedef enum {
CODENAME_LUCIENNE,
CODENAME_NAPLES,
CODENAME_CHAGALL,
+ CODENAME_PHOENIX,
CODENAME_COUNT
} smu_processor_codename;
diff --git a/scripts/dump_pm_table.py b/scripts/dump_pm_table.py
index 2b3ebcc..91b6ae9 100755
--- a/scripts/dump_pm_table.py
+++ b/scripts/dump_pm_table.py
@@ -74,7 +74,12 @@ def getCodeName():
"Vangogh",
"Cezanne",
"Milan",
- "Dali"
+ "Dali",
+ "Lucienne",
+ "Naples",
+ "Chagall",
+ "Raphael",
+ "Phoenix"
]
args = read_file_str(CN_PATH, 2)
diff --git a/scripts/test.py b/scripts/test.py
index 301e457..6bb2ff3 100755
--- a/scripts/test.py
+++ b/scripts/test.py
@@ -179,7 +179,12 @@ def test_get_codename():
"Vangogh",
"Cezanne",
"Milan",
- "Dali"
+ "Dali",
+ "Lucienne",
+ "Naples",
+ "Chagall",
+ "Raphael",
+ "Phoenix"
]
args = read_file_str(CN_PATH, 3)
diff --git a/smu.c b/smu.c
index a1821d0..620e2e6 100755
--- a/smu.c
+++ b/smu.c
@@ -289,7 +289,7 @@ int smu_resolve_cpu_class(struct pci_dev* dev) {
return 0;
}
- // Zen3 (model IDs for unreleased silicon not confirmed yet).
+ // Zen3/4 (model IDs for unreleased silicon not confirmed yet).
else if (cpu_family == 0x19) {
switch(cpu_model) {
case 0x01:
@@ -312,6 +312,9 @@ int smu_resolve_cpu_class(struct pci_dev* dev) {
case 0x61:
g_smu.codename = CODENAME_RAPHAEL;
break;
+ case 0x74:
+ g_smu.codename = CODENAME_PHOENIX;
+ break;
default:
pr_err("CPUID: Unknown Zen3/4 processor model: 0x%X (CPUID: 0x%08X)", cpu_model, cpuid);
return -2;
@@ -320,7 +323,7 @@ int smu_resolve_cpu_class(struct pci_dev* dev) {
}
else {
- pr_err("CPUID: failed to detect Zen/Zen+/Zen2/Zen3 processor family (%Xh).", cpu_family);
+ pr_err("CPUID: failed to detect Zen/Zen+/Zen2/Zen3/Zen4 processor family (%Xh).", cpu_family);
return -1;
}
}
@@ -362,6 +365,7 @@ int smu_init(struct pci_dev* dev) {
case CODENAME_RAVENRIDGE2:
case CODENAME_DALI:
case CODENAME_REMBRANDT:
+ case CODENAME_PHOENIX:
g_smu.addr_rsmu_mb_cmd = 0x3B10A20;
g_smu.addr_rsmu_mb_rsp = 0x3B10A80;
g_smu.addr_rsmu_mb_args = 0x3B10A88;
@@ -404,6 +408,7 @@ LOG_RSMU:
case CODENAME_DALI:
case CODENAME_VANGOGH:
case CODENAME_REMBRANDT:
+ case CODENAME_PHOENIX:
goto MP1_DETECT;
default:
pr_err("Unknown processor codename: %d", g_smu.codename);
@@ -458,6 +463,7 @@ MP1_DETECT:
break;
case CODENAME_VANGOGH:
case CODENAME_REMBRANDT:
+ case CODENAME_PHOENIX:
g_smu.mp1_if_ver = IF_VERSION_13;
g_smu.addr_mp1_mb_cmd = 0x3B10528;
g_smu.addr_mp1_mb_rsp = 0x3B10578;
@@ -501,6 +507,7 @@ const char* getCodeName(enum smu_processor_codename codename)
case CODENAME_NAPLES: return "Naples";
case CODENAME_CHAGALL: return "Chagall";
case CODENAME_RAPHAEL: return "Raphael";
+ case CODENAME_PHOENIX: return "Phoenix";
default: return "Undefined";
}
}
@@ -572,6 +579,7 @@ u64 smu_get_dram_base_address(struct pci_dev* dev) {
case CODENAME_LUCIENNE:
case CODENAME_CEZANNE:
case CODENAME_REMBRANDT:
+ case CODENAME_PHOENIX:
fn[0] = 0x66;
goto BASE_ADDR_CLASS_1;
case CODENAME_COLFAX:
@@ -683,6 +691,7 @@ enum smu_return_val smu_transfer_table_to_dram(struct pci_dev* dev) {
case CODENAME_RENOIR:
case CODENAME_LUCIENNE:
case CODENAME_REMBRANDT:
+ case CODENAME_PHOENIX:
args.s.arg0 = 3;
fn = 0x65;
break;
@@ -772,6 +781,7 @@ enum smu_return_val smu_get_pm_table_version(struct pci_dev* dev, u32* version)
case CODENAME_LUCIENNE:
case CODENAME_CEZANNE:
case CODENAME_REMBRANDT:
+ case CODENAME_PHOENIX:
fn = 0x06;
break;
default:
@@ -923,6 +933,18 @@ u32 smu_update_pmtable_size(u32 version) {
goto UNKNOWN_PM_TABLE_VERSION;
}
break;
+ case CODENAME_PHOENIX:
+ switch (version) {
+ case 0x4C0006:
+ case 0x4C0007:
+ case 0x4C0008:
+ g_smu.pm_dram_map_size = 0xAA0;
+ break;
+ default:
+ goto UNKNOWN_PM_TABLE_VERSION;
+ }
+ break;
+
default:
return SMU_Return_Unsupported;
}
@@ -956,6 +978,7 @@ enum smu_return_val smu_read_pm_table(struct pci_dev* dev, unsigned char* dst, s
g_smu.codename == CODENAME_RENOIR ||
g_smu.codename == CODENAME_LUCIENNE ||
g_smu.codename == CODENAME_REMBRANDT ||
+ g_smu.codename == CODENAME_PHOENIX ||
g_smu.codename == CODENAME_CEZANNE ||
g_smu.codename == CODENAME_CHAGALL ||
g_smu.codename == CODENAME_MILAN) {
diff --git a/smu.h b/smu.h
index 62bc256..525e326 100755
--- a/smu.h
+++ b/smu.h
@@ -85,6 +85,7 @@ enum smu_processor_codename {
CODENAME_NAPLES,
CODENAME_CHAGALL,
CODENAME_RAPHAEL,
+ CODENAME_PHOENIX,
CODENAME_COUNT
};
--
GitLab
|