csky-riscv64-linux-900-series-bin
|
2.6.1-0 |
0 |
0.00
|
C-Sky riscv64 linux for 900 series (Xuantie) |
taotieren
|
2023-02-22 06:48 (UTC) |
csky-riscv64-elf-900-series-bin
|
2.6.1-0 |
0 |
0.00
|
C-Sky riscv64 elf for 900 series (Xuantie) |
taotieren
|
2023-02-22 06:48 (UTC) |
iamroot-riscv64
|
21-1 |
0 |
0.00
|
Emulating the syscall chroot(2) in an unpriviliged process (riscv64) |
gportay
|
2024-04-09 19:30 (UTC) |
libriscv
|
1.1-1 |
0 |
0.00
|
RISC-V userspace emulator library |
Popolon
|
2024-01-31 12:21 (UTC) |
meson-cross-riscv64-linux-gnu
|
1-1 |
0 |
0.00
|
Meson cross file for riscv64 |
1ace
|
2019-01-08 19:01 (UTC) |
python-pythondata-cpu-vexriscv-git
|
2020.08.r1.g2962f4a-1 |
0 |
0.00
|
Python module containing verilog files for vexriscv cpu (for use with LiteX) |
xiretza
|
2020-11-17 11:55 (UTC) |
riscv-openocd-wch
|
1.60-2 |
0 |
0.00
|
Snapshots of customised riscv-openocd versions as used in MounRiver Studio for WCH / CH32 chips. |
yjun
|
2023-08-13 09:46 (UTC) |
riscv-sifive-elf-binutils
|
2.32-1 |
0 |
0.00
|
A set of programs to assemble and manipulate binary and object files for the RISC-V (bare-metal) target |
orphan
|
2019-06-25 08:33 (UTC) |
riscv-sifive-elf-gcc
|
9.1.0-1 |
0 |
0.00
|
Cross compiler for 32-bit and 64-bit RISC-V |
orphan
|
2019-06-25 08:45 (UTC) |
riscv-sifive-elf-gcc-stage1
|
9.1.0-1 |
0 |
0.00
|
Cross compiler for 32-bit and 64-bit RISC-V |
orphan
|
2019-06-25 08:38 (UTC) |
riscv-sifive-elf-newlib
|
3.1.0-1 |
0 |
0.00
|
A C standard library implementation intended for use on embedded systems (RISC-V bare metal) |
orphan
|
2019-06-25 08:42 (UTC) |
riscv64-elf-binutils-git
|
gdb.13.branchpoint.r1831.gd466f7492ec-1 |
0 |
0.00
|
A set of programs to assemble and manipulate binary and object files for the RISCV64 (bare-metal) target |
leuko
|
2023-04-03 15:19 (UTC) |
riscv64-linux-gnu-pkg-config
|
0.29.2-1 |
0 |
0.00
|
pkg-config that only looks in /usr/riscv64-linux-gnu/lib/pkgconfig and not in /usr/lib/pkgconfig |
1ace
|
2019-01-07 17:52 (UTC) |
riscv64-linux-uclibc-binutils
|
2.39-1 |
0 |
0.00
|
Assemble and manipulate binary and object files for 32-bit and 64-bit RISC-V |
jaap
|
2023-08-28 20:07 (UTC) |
riscv64-linux-uclibc-gcc
|
12.2.0-1 |
0 |
0.00
|
Cross compiler for 32-bit and 64-bit RISC-V |
jaap
|
2023-08-28 19:40 (UTC) |
riscv64-linux-uclibc-linux-api-headers
|
5.8-1 |
0 |
0.00
|
Kernel headers sanitized for use in userspace (riscv64-linux-uclibc) |
jaap
|
2023-08-30 12:36 (UTC) |
riscv64-linux-uclibc-uclibcng
|
1.0.41-1 |
0 |
0.00
|
A C library for embedded Linux |
jaap
|
2023-08-28 20:24 (UTC) |
riscv64-lp64d-glibc-bleeding-edge-toolchain
|
2023.11-1 |
0 |
0.00
|
Ready-to-use cross-compilation toolchain provided by bootlin.com |
gportay
|
2024-01-06 01:20 (UTC) |
riscv64-lp64d-musl-bleeding-edge-toolchain
|
2023.11-1 |
0 |
0.00
|
Ready-to-use cross-compilation toolchain provided by bootlin.com |
gportay
|
2024-01-06 01:20 (UTC) |
riscv64-unknown-elf-picolibc
|
1.8.6-1 |
0 |
0.00
|
Fork of newlib with stdio bits from avrlibc |
xiretza
|
2024-03-03 13:35 (UTC) |
coreboot-toolchain-gcc-riscv
|
24.02-1 |
5 |
0.00
|
Used to build coreboot |
felixsinger
|
2024-04-05 04:03 (UTC) |
devtools-riscv64
|
1:1.2.0+patch1-1 |
2 |
0.00
|
Tools for Arch Linux RISC-V package maintainers |
Xeonacid
|
2024-05-06 05:43 (UTC) |
riscv-isa-sim-git
|
r3050.5a114574-2 |
4 |
0.00
|
Spike, a RISC-V ISA Simulator |
weilinfox
|
2023-11-03 13:17 (UTC) |
riscv-openocd-git
|
v20180629.r2363.g9906763b8-1 |
2 |
0.00
|
Fork of OpenOCD that has RISC-V support |
pattop
|
2022-06-05 22:55 (UTC) |
riscv-tests-git
|
1-1 |
1 |
0.00
|
Hosts unit tests for RISC-V processors. |
orphan
|
2019-06-25 08:47 (UTC) |
riscv-pk-git
|
1-1 |
2 |
0.00
|
RISC-V proxy kernel and boot loader |
Sequencer
|
2019-06-25 08:50 (UTC) |
riscv-none-elf-gcc-bin
|
12.2.0_1-1 |
4 |
0.00
|
Cross compiler for 32-bit and 64-bit RISC-V (The xPack GNU RISC-V Embedded GCC) |
KirisameMarisa
|
2022-09-03 04:44 (UTC) |
riscv64-unknown-elf-newlib
|
3.3.0-1 |
1 |
0.01
|
A C standard library implementation intended for use on embedded systems (microcontrollers) |
esmil
|
2020-03-23 20:29 (UTC) |
mounriver-studio-toolchain-riscv-gcc-bin
|
1.91-0 |
4 |
0.01
|
MRS Toolchain Support for RISC-V assembly and GNU C compilation, link operation. |
taotieren
|
2024-04-21 09:17 (UTC) |
mounriver-studio-toolchain-riscv-gcc12-bin
|
1.91-0 |
4 |
0.01
|
MRS Toolchain Support for RISC-V assembly and GNU C compilation, link operation. |
taotieren
|
2024-04-21 09:17 (UTC) |
tinycorrect
|
0.1.r23.gfd2d32a-1 |
1 |
0.03
|
Auto detect & correct typeset, inline code, toc, file name, header, images, urls and words of Markdown documents, originally written for the RISC-V Linux project: https://gitee.com/tinylab/riscv-linux. |
taotieren
|
2023-06-15 14:59 (UTC) |
riscv-gnu-toolchain-bin
|
2022.10.11-1 |
4 |
0.03
|
GNU toolchain for RISC-V, including GCC. Precompiled riscv64-unknown-elf-gcc, riscv32-unknown-elf-gcc, riscv64-unknown-linux-gnu-gcc, and riscv32-unknown-linux-gnu-gcc. |
supergarfield
|
2022-12-09 07:11 (UTC) |
riscv64-unknown-elf-binutils
|
2.42-1 |
9 |
1.01
|
Assemble and manipulate binary and object files for 32bit and 64bit RISC-V |
Maxr1998
|
2024-03-07 21:10 (UTC) |
riscv64-unknown-elf-gcc
|
13.2.0-2 |
8 |
1.01
|
The GNU Compiler Collection - cross compiler for 32bit and 64bit RISC-V bare-metal |
Maxr1998
|
2024-03-07 21:27 (UTC) |