|
alchitry-labs-bin
|
1.2.7-7 |
0 |
0.00
|
Alchitry Labs - The Easiest Way to Program FPGAs |
r1cebank
|
2021-10-31 19:29 (UTC) |
|
bfgminer-git
|
5.5.0.r34.g866fd36f-4 |
0 |
0.00
|
Bitcoin miner featuring overclocking, monitoring, fan speed control and remote management. For FPGA/GPU/CPU Bitcoin mining. |
ZhangHua
|
2022-09-05 14:34 (UTC) |
|
csky-cpu-wujian100-open-fpga
|
1.0.0-1 |
0 |
0.00
|
C-Sky CPU wujian100 open FPGA. IC design and development should be faster，simpler and more reliable. |
taotieren
|
2021-07-29 08:23 (UTC) |
|
digilent-xdc-git
|
r36.ad3ecaf-1 |
0 |
0.00
|
A collection of Master XDC board constraints files for Digilent FPGA and Zynq boards |
telans
|
2019-02-15 10:23 (UTC) |
|
ecpprog-git
|
r28.2b3e8ea-1 |
0 |
0.00
|
A basic driver for FTDI based JTAG probes to program ECP5 FPGAs |
nobodywasishere
|
2020-08-11 06:30 (UTC) |
|
f32c-tools
|
0698352-1 |
0 |
0.00
|
ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5) |
thegala
|
2021-01-18 15:46 (UTC) |
|
fomu-verilog-blink
|
0.1-1 |
0 |
0.00
|
Blink test for FOMU FPGA ? |
GNUtoo
|
2022-04-27 16:06 (UTC) |
|
fpga-interchange-schema-git
|
r22.cb6d168-2 |
0 |
0.00
|
FPGA interchange schema definitions |
xiretza
|
2021-03-17 19:36 (UTC) |
|
icesugar-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) - Development Environments |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-dapprog-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) iCESugar-pro is a FPGA board base on Lattice LFE5U-25F-6BG256C - dapprog |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-demo-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) - demo & firmware |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-doc-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) - doc & schematic |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-icesprog-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) - icesprog |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-nano-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) iCESugar-nano FPGA board (base on iCE40LP1K) - Development Environments |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-nano-demo-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar-nano FPGA board (base on iCE40LP1K) - demo & firmware |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-nano-doc-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar-nano FPGA board (base on iCE40LP1K) - doc & schematic |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-pro-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar FPGA Board (base on iCE40UP5k) iCESugar-pro is a FPGA board base on Lattice LFE5U-25F-6BG256C - Development Environments |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-pro-demo-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar-pro is a FPGA board base on Lattice LFE5U-25F-6BG256C - demo & firmware |
taotieren
|
2024-01-09 03:14 (UTC) |
|
icesugar-pro-doc-git
|
1.1a.r24.g5bcd33d-1 |
0 |
0.00
|
iCESugar-pro is a FPGA board base on Lattice LFE5U-25F-6BG256C - doc & schematic |
taotieren
|
2024-01-09 03:14 (UTC) |
|
intel-soc-eds
|
20.1.0.711-2 |
0 |
0.00
|
Intel SoC FPGA Embedded Design Suite (Standard Edition) |
Alex
|
2023-11-06 17:58 (UTC) |
|
kactus2-git
|
3.2.298.0.svn2649-1 |
0 |
0.00
|
Open source IP-XACT-based tool for ASIC, FPGA and embedded systems design |
marzoul
|
2016-12-03 12:41 (UTC) |
|
mister-menu
|
20230223-1 |
0 |
0.00
|
FPGA bitstream loaded by uboot which shows the MiSTer menu |
amstan
|
2023-07-27 23:27 (UTC) |
|
nextpnr-gowin-git
|
r4016.347ba3af-1 |
0 |
0.00
|
Portable FPGA place and route tool |
Popolon
|
2022-02-20 14:43 (UTC) |
|
nextpnr-machxo2-nightly
|
1:20240522_nextpnr_0.7_39_gb7f91e57-1 |
0 |
0.00
|
nextpnr portable FPGA place and route tool - for machxo2 |
lethalbit
|
2024-05-22 00:01 (UTC) |
|
nextpnr-xilinx-git
|
2:r2994.f7938759-1 |
0 |
0.00
|
nextpnr portable FPGA place and route tool - for Xilinx |
ivanovp
|
2024-03-12 22:24 (UTC) |
|
openvizsla-host-git
|
r296.f70968b-1 |
0 |
0.00
|
The host software of OpenVizsla, Open Hardware FPGA-based USB analyzer. |
ss1h2a3tw
|
2022-10-20 17:20 (UTC) |
|
parallella-fpga-bitstream-headless-7010
|
2019.1-1 |
0 |
0.00
|
Bitstream files needed for Parallella (Headless, Zynq 7010) |
mkaczanowski
|
2020-01-09 23:50 (UTC) |
|
parallella-fpga-bitstream-headless-7020
|
2019.1-1 |
0 |
0.00
|
Bitstream files needed for Parallella (Headless, Zynq 7020) |
mkaczanowski
|
2020-01-09 23:50 (UTC) |
|
prjoxide-nightly
|
1:20240522_30712ff-1 |
0 |
0.00
|
Documenting Lattice's 28nm FPGA parts |
lethalbit
|
2024-05-22 00:01 (UTC) |
|
python-fasm-git
|
0.0.2.r98.g9a73d70-4 |
0 |
0.00
|
FPGA Assembly (FASM) Parser and Generation library |
xiretza
|
2022-06-17 07:56 (UTC) |
|
python-gfpgan
|
1.3.8-1 |
0 |
0.00
|
GFPGAN aims at developing Practical Algorithms for Real-world Face Restoration. |
huyz
|
2022-10-21 14:05 (UTC) |
|
gfpgan-model
|
1.3.8-1 |
0 |
0.00
|
Pre-trained model and interference script for python-gfpgan. |
huyz
|
2022-10-21 14:05 (UTC) |
|
python-intel-jtag-uart
|
0.0.3-1 |
0 |
0.00
|
Package to interact with JTAG UART modules in Intel FPGA designs |
piernov
|
2023-12-12 15:43 (UTC) |
|
python-quicklogic-fasm-git
|
r56.fafa623-1 |
0 |
0.00
|
Tools, scripts and resources for generating a bitstream from FASM files for QuickLogic FPGAs |
xiretza
|
2022-05-14 18:03 (UTC) |
|
python-tinyfpgab-git
|
r80.e8f9150-1 |
0 |
0.00
|
Programmer for the TinyFPGA B2 boards |
xiretza
|
2021-01-21 09:49 (UTC) |
|
python-tinyprog-git
|
1.0.24.dev114+g97f6353-2 |
0 |
0.00
|
TinyFPGA programmer |
japm48
|
2020-03-29 00:28 (UTC) |
|
qlf_fasm-git
|
r44.e5d0915-1 |
0 |
0.00
|
FASM to/from bitstream converter for QuickLogic qlf FPGA device family |
xiretza
|
2022-05-14 18:30 (UTC) |
|
quartus-130
|
13.0.1.232-1 |
0 |
0.00
|
Quartus II 13.0 SP1 Subscription Edition (with old MAX CPLDs and Cyclone FPGAs) |
hybroid
|
2018-10-15 19:26 (UTC) |
|
quartus-standard
|
18.1.0.625-1 |
0 |
0.00
|
Quartus Prime Standard Edition design software for Altera FPGA's. Modular package |
orphan
|
2019-07-21 11:06 (UTC) |
|
quicklogic-fpga-toolchain-bin
|
0.1.0-1 |
0 |
0.00
|
SymbiFlow variant provided as QuickLogic's vendor toolchain |
ktemkin
|
2020-06-09 03:46 (UTC) |
|
rapidwright
|
2023.2.1_beta-1 |
0 |
0.00
|
Build Customized FPGA Implementations for Vivado |
xiretza
|
2024-03-03 14:54 (UTC) |
|
riffa-git
|
2.2.2.git20220907-1 |
0 |
0.00
|
RIFFA: A Reusable Integration Framework For FPGA Accelerators |
marzoul
|
2022-09-07 09:14 (UTC) |
|
silice-git
|
3d12246b-8 |
0 |
0.00
|
An open source language that simplifies prototyping and writing algorithms on FPGA architectures. |
Popolon
|
2023-09-19 08:45 (UTC) |
|
vivado-lab-edition
|
2023.2-1 |
0 |
0.00
|
FPGA/CPLD Lab Tools for Xilinx devices |
m42uko
|
2024-04-20 08:38 (UTC) |
|
xrt
|
2023.1-1 |
0 |
0.00
|
Xilinx Run Time for FPGA, with its dkms modules |
gnaggnoyil
|
2024-01-16 12:51 (UTC) |
|
xrt-bin
|
2020.2-1 |
0 |
0.00
|
Xilinx Run Time for FPGA |
h313
|
2021-11-26 01:01 (UTC) |
|
xrt-git
|
r7456.50f17b1d5-1 |
0 |
0.00
|
Xilinx runtime for Ultrascale, Versal and MPSoC-based FPGAs |
leuko
|
2024-01-24 10:35 (UTC) |
|
xtrx-xc3sprog-git
|
r813.d97d672-1 |
0 |
0.00
|
Suite of utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under Linux. Special branch for XTRX over USB3 adapter |
orphan
|
2019-04-24 02:30 (UTC) |
|
bladerf-git
|
2018.12.rc2.r36.g896d2431-1 |
1 |
0.00
|
Driver, userspace, fpga & firmware for the bladeRF SDR. |
sab24
|
2019-06-04 21:00 (UTC) |
|
flopoco
|
4.1.3-1 |
1 |
0.00
|
A generator of arithmetic cores (Floating-Point Cores, but not only) for FPGAs (but not only) |
marzoul
|
2021-11-23 22:44 (UTC) |