python-tinyfpgab-git
|
r80.e8f9150-1 |
0 |
0.00
|
Programmer for the TinyFPGA B2 boards |
xiretza
|
2021-01-21 09:49 (UTC) |
python-tinyprog-git
|
1.0.24.dev114+g97f6353-2 |
0 |
0.00
|
TinyFPGA programmer |
japm48
|
2020-03-29 00:28 (UTC) |
qlf_fasm-git
|
r44.e5d0915-1 |
0 |
0.00
|
FASM to/from bitstream converter for QuickLogic qlf FPGA device family |
xiretza
|
2022-05-14 18:30 (UTC) |
quartus-130
|
13.0.1.232-1 |
0 |
0.00
|
Quartus II 13.0 SP1 Subscription Edition (with old MAX CPLDs and Cyclone FPGAs) |
hybroid
|
2018-10-15 19:26 (UTC) |
quartus-free-quartus
|
23.1.0.991-1 |
21 |
0.00
|
Quartus Prime Lite design software for Intel FPGAs |
gbs
|
2024-02-02 23:17 (UTC) |
quartus-free-questa
|
23.1.0.991-1 |
21 |
0.00
|
Quartus Prime Lite - Questa-Intel FPGA Starter Edition |
gbs
|
2024-02-02 23:17 (UTC) |
quartus-standard
|
18.1.0.625-1 |
0 |
0.00
|
Quartus Prime Standard Edition design software for Altera FPGA's. Modular package |
orphan
|
2019-07-21 11:06 (UTC) |
quicklogic-fpga-toolchain-bin
|
0.1.0-1 |
0 |
0.00
|
SymbiFlow variant provided as QuickLogic's vendor toolchain |
ktemkin
|
2020-06-09 03:46 (UTC) |
rapidwright
|
2023.2.1_beta-1 |
0 |
0.00
|
Build Customized FPGA Implementations for Vivado |
xiretza
|
2024-03-03 14:54 (UTC) |
riffa-git
|
2.2.2.git20220907-1 |
0 |
0.00
|
RIFFA: A Reusable Integration Framework For FPGA Accelerators |
marzoul
|
2022-09-07 09:14 (UTC) |
sigrok-firmware-saleae-logic
|
1.2.10-1 |
2 |
0.00
|
Firmware and FPGA bitstream binaries for Saleae Logic (Pro) devices used with Sigrok. |
samekh
|
2020-05-19 18:51 (UTC) |
silice-git
|
3d12246b-8 |
0 |
0.00
|
An open source language that simplifies prototyping and writing algorithms on FPGA architectures. |
Popolon
|
2023-09-19 08:45 (UTC) |
vivado-lab-edition
|
2023.2-1 |
0 |
0.00
|
FPGA/CPLD Lab Tools for Xilinx devices |
m42uko
|
2024-04-20 08:38 (UTC) |
vtr-git
|
8.0.0.r3718.g265904830-1 |
1 |
0.00
|
Open Source CAD Flow for FPGA Research |
xiretza
|
2021-06-04 08:39 (UTC) |
xrt
|
2023.1-1 |
0 |
0.00
|
Xilinx Run Time for FPGA, with its dkms modules |
gnaggnoyil
|
2024-01-16 12:51 (UTC) |
xrt-bin
|
2020.2-1 |
0 |
0.00
|
Xilinx Run Time for FPGA |
h313
|
2021-11-26 01:01 (UTC) |
xrt-git
|
r7456.50f17b1d5-1 |
0 |
0.00
|
Xilinx runtime for Ultrascale, Versal and MPSoC-based FPGAs |
leuko
|
2024-01-24 10:35 (UTC) |
xtrx-xc3sprog-git
|
r813.d97d672-1 |
0 |
0.00
|
Suite of utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under Linux. Special branch for XTRX over USB3 adapter |
orphan
|
2019-04-24 02:30 (UTC) |
apio
|
0.8.4-1 |
2 |
0.00
|
Experimental micro-ecosystem for open FPGAs |
Xesxen
|
2023-11-08 22:59 (UTC) |
tang-dynasty
|
5.0.3_30786-1 |
1 |
0.00
|
Tang Dynasty IDE for Anlogic FPGAs |
caylin
|
2021-09-24 07:11 (UTC) |
xc3sprog-svn
|
0.r795-1 |
6 |
0.00
|
Utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters |
uffe
|
2021-08-02 16:15 (UTC) |
modelsim-intel-starter
|
20.1.1.720-1 |
4 |
0.00
|
ModelSim-Intel FPGA Starter Edition - last version |
gbs
|
2021-11-11 20:24 (UTC) |
vivado-boards-git
|
r193.c9000e6-1 |
1 |
0.00
|
Vivado Board Files for Digilent FPGA Boards |
telans
|
2023-01-07 01:04 (UTC) |
oss-cad-suite-build-bin
|
20240519-1 |
2 |
0.00
|
Nightly builds of open-source FPGA tools |
tannewt
|
2024-05-19 12:05 (UTC) |
open-fpga-loader-git
|
r585.3ea05cc-1 |
1 |
0.00
|
Universal utility for programming FPGA |
japm48
|
2021-08-05 15:27 (UTC) |
prjapicula
|
0.12-2 |
4 |
0.01
|
Project Apicula bitstream documentation for Gowin FPGAs |
rpls
|
2024-04-21 12:15 (UTC) |
nextpnr-all-nightly
|
1:20240522_nextpnr_0.7_39_gb7f91e57-1 |
1 |
0.01
|
nextpnr portable FPGA place and route tool - ice40, ecp5, machxo2, nexus, and generic |
lethalbit
|
2024-05-22 00:01 (UTC) |
nextpnr-ice40-nightly
|
1:20240522_nextpnr_0.7_39_gb7f91e57-1 |
3 |
0.01
|
nextpnr portable FPGA place and route tool - for ice40 |
lethalbit
|
2024-05-22 00:01 (UTC) |
vivado
|
2023.2-1 |
16 |
0.05
|
FPGA/CPLD design suite for Xilinx devices |
VitalyR
|
2024-02-01 15:20 (UTC) |
hdl-make
|
3.0.r537.gf3c20ff-1 |
2 |
0.07
|
Hdlmake is a tool for generating multi-purpose makefiles for FPGA projects. |
Lacsapix
|
2022-04-21 09:30 (UTC) |
icestorm-git
|
r788.83b8ef9-2 |
20 |
0.21
|
Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered) |
FabioLolix
|
2021-12-22 10:25 (UTC) |
vitis
|
2023.2-2 |
3 |
0.60
|
FPGA/CPLD design suite for Xilinx devices |
Freed
|
2023-12-05 22:49 (UTC) |
nextpnr-git
|
0.7.r29.gf0859503-1 |
21 |
0.65
|
Portable FPGA place and route tool |
xiretza
|
2024-05-01 16:12 (UTC) |